A Large Dynamic Range Floating Memristor Emulator With Equal Port Current Restriction

Yifei Pu and Bo Yu

Abstract—In this paper, a large dynamic range floating memristor emulator (LDRFME) with equal port current restriction is proposed to be achieved by a large dynamic range floating voltage-controlled linear resistor (VCLR). Since real memristors have not been largely commercialized until now, the application of a LDRFME to memristive systems is reasonable. Motivated by this need, this paper proposes an achievement of a LDRFME based on a feasible transistor model. A first circuit extends the voltage range of the triode region of an ordinary junction field effect transistor (JFET). The idea is to use this JFET transistor as a tunable linear resistor. A second memristive non-linear circuit is used to drive the resistance of the first JFET transistor. Then those two circuits are connected together and, under certain conditions, the obtained “resistor” presents a hysteretic behavior,which is considered as a memristive effect. The electrical characteristics of a LDRFME are validated by software simulation and real measurement, respectively.

I. INTRODUCTION

THE memristor was originally envisioned [1] and generalized to memristive systems [2] by the great circuit theorist Chua as a missing nonlinear passive two-terminal electrical component [3], which has non-volatility property [4]-[10].A broader definition of the memristor was argued to cover all forms of two-terminal non-volatile memory devices based on resistance switching effects [4]-[8], [11]. The memristor,M,completes the set of relations with [1]

whereVi(t) andIi(t) denote the instantaneous input voltage and input current of a memristor, respectively.

Furthermore, from Chua’s axiomatic circuit element system[1]-[6] and according to constitutive relation, logical consistency, axiomatic completeness and formal symmetry,there should be a capacitive fracmemristor (fractional-order memristor) and an inductive fracmemristor corresponding to the capacitive fractor and inductive fractor [12], [13],respectively. The concept of the memristor was generalized preliminarily from the classic integer-order memristor to that of the fractional-order one [14], [15].

Nowadays, since real memristors were not largely commercialized until recently, the application of a floating memristor emulator to memristive systems is reasonable. A chalcogenide-based ion-conducting Neuro-Bit memristor,made by Bio Inspired Technologies [16], is currently the only memristor commercially available, and is a nano-scale thinfilm resistor fabricated on a silicon wafer that has a memory.However, the applications of the Neuro-Bit memristor are somewhat limited by its relatively small dynamic range of maximum ratings (compliance current 40 μA for writes,10 mA for erases or 1 mA for reads; limit voltage to ±5 V for writes and erases or 50 mV for reads, erases greater than 4 V pose greater risk of damaging the devices than writes due to higher allowable current levels) and its relatively large requirement of testing equipment (Agilent B1500A semiconductor device analyzer, HP4145/56 semiconductor parameter analyzers or equivalent product). Therefore, the scope of applications of this Neuro-Bit memristor are somewhat limited by its relatively small dynamic range of maximum ratings, relatively high requirement of test equipment, working environment effects and relatively high selling price [16]. In addition, although some memristor emulators are designed without grounded restriction, their input current cannot be guaranteed to be equal to the output current as they are only suitable for a specific memristor model. For instance, Yuet al. were the first to propose a floating memristor emulator. However, this equivalent memristor cannot guarantee its input current to be equal to output current [17]. Sahet al. have proposed expandable circuits of memcapacitor emulator. Nevertheless, this emulator is only suitable for HP TiO2 memristor model [18].

Therefore, to solve these problems, in this paper, a LDRFME with equal port current restriction is proposed using a large dynamic range floating voltage-controlled linear resistor (VCLR). For a LDRFME, to enlarge the dynamic range of maximum ratings, two bootstrapping circuits are applied; to implement a VCLR, an ordinary junction field effect transistor (JFET) is utilized; to achieve a floating memristor emulator, two current followers are employed; and to enlarge the scope of application, it is designed to be feasible to convert between two-port ordinary memristor and threeport mirror one.

II. A LARGE DYNAMIC RANGE FLOATING MEMRISTOR EMULATOR

This section proposes the LDRFME with equal port current restrictions, whose idea is based purely on a floating equivalent model for the memristor using JFET. Some electrical characteristics of the LDRFME, such as low implementation cost, low-sensitive to electrostatic discharge,freely accessible floating circuit element, large dynamic range of maximum ratings and feasible conversion between two-port ordinary memristor and three-port mirror one, are its major advantages when compared with the Neuro-Bit memristor[16] and other memristor emulators [19].

At first, a small dynamic range floating VCLR can be achieved by JFET, which is shown in Fig. 13 in [15]. To further implement a LDRFME with equal port current restriction, inspired by the Fig. 13 in [15], a large dynamic range floating VCLR should be achieved in the first step, as shown in Fig. 1.

In Fig. 1, we set the parameter 0 ＜α ＜1.A,BandCare the input port, output port and input port of control voltage source of a large dynamic range floating VCLR, respectively.VA(t),VB(t),VC(t),IinandIoutare the input voltage source, output voltage source, control voltage source, input current and output current of a large dynamic range floating VCLR,respectively.D,GandSare the drain electrode, gate electrode and source electrode of a JFET. Further,Gis drawn in the middle of the channel of a JFET that suggestsDandSare interchangeable. For the sake of concision, in this paper, we only analyze aN-channel JFET as an example. For aPchannel JFET, we obtain a similar conclusion. For aNchannel JFET, it should satisfyVDS＞0. When 0 ＜VGS＜VPandit works in regions of variable resistance (triode region), in which its drain-source current can be expressed as

whereIDS,IDS S,VP,VGSandVDSare the drain-source current,saturation current at zero gate-source voltage, pinch-off voltage, gate-source voltage and drain-source voltage of a JFET, respectively. Thus, from (3), the resistance between the drain electrode and source electrode,RDS, of a JFET can be derived as

Equations (3) and (4) show that whenVDSis very small,sinceRDSonly depends onVGS, a JFET is an approximate VCLR. However, withVDSincreasing, sinceRDSis no longer only determined byVGS, but increases with the increase ofVDS, the relationship betweenIDSandVDSdeviates from linearity.

Therefore, to obtain a VCLR, we should enlarge the dynamic range ofVDSof a JFET. In Fig. 1, (A3andA9) and(A4andA10) are two bootstrapping circuits, respectively.Thus, forA2andA5are two voltage followers,A3andA4are two phase-identical proportioners andA9andA10are two adders, we can derive thatV3=(2?α)VA,V4=(2?α)VB,9=VA+(1?α)VBandV10=VB+(1?α)VA. Then,A14is a subtracter, we getV14=(V9?V10)/2=α(VA?VB)/2 . Thus, forA13is a phaseidentical adder, we obtainVG=V14+V10+VC=α(VA?VB)/2+VB+(1?α)VA+VC. Further, according to the virtual short amplifier, we haveVD=VN11=VP11=V9=VA+(1?α)VB,VS=VN12=VP12=V10=VB+(1?α)VAandVDS=VD?VS=α(VA?VB). Thus, we get

Substituting (5) into (4), we obtain and virtual off electrical characteristics of an operational

Equations (6) and (7) show that the dynamic range ofVDSof a JFET is enlarged 1/α-fold by two aforementioned bootstrapping circuits.RDSis a VCLR controlled byVC. Note that with regard to a N-channel JFET, sinceVDS＞0,0 ＜VGS＜VPandfrom (5),VA,VBandVCshould satisfyVA＞VB, ?α(VA?VB)/2 ＜VC＜VP?α(VA?VB)/2 andIin=Iout. In Fig. 1, (A1,A7andA11) and (A6,A8andA12) areVN12=VP12=V10=VB+(1?α)VA=V12+rIDSandVN11=VP11=V9=VA+(1?α)VB=V11?rIDS. Then, we getV12=VB+(1?α)VA?rIDSandV11=VA+(1?α)VB+rIDS. Thus,forA1andA6are two voltage followers, we obtain

In addition, to obtain a floating resistor, we should make two current followers, respectively. Thus, we can derive that

Thus, from (8) and (9), we get

Fig. 1. A large dynamic range floating VCLR achieved by a JFET.

Equation (10) shows thatIin=Iout=IDSis achieved by two aforementioned current followers. Thus, from (7) and (10), the input resistance,RAB(t), of a large dynamic range floating VCLR can be derived as

Comparing (6) with (11), we can further see thatRAB=(1/α)RDS. The input resistance of a large dynamic range floating VCLR is simultaneously enlarged 1/α-fold compared to that of a JFET.

Second, to implement a LDRFME, an equivalent circuit of the memristor should be achieved in the second step. From(2), we can see that in a controlled pulsing scenario, a memristor retains a state that is a function of both the history of the device and the current applied signal. For a memristor,the corresponding quantity of electric charge iswhereis the first-order integral operator.From (2), the memristance,can be derived as

wherecan be theoretically an arbitrary analytical function ofq(t) in accordance with specific conditions. Therefore, to implement a LDRFME, a control voltage sourceVC(t)in Fig.1 and (11) should be achieved according to the electrical characteristics of a memristor, given as

Equation (13) shows that to implement a LDRFME, a control voltage sourceVC(t) in Fig.1 should be generated by an equivalent circuit of the memristor. The dynamical behavior of memristors varies with the process and material that they are made of. However, the physical device models of some memristors, such as the Neuro-Bit memristor [16], are difficult to be explicitly mathematically expressed. Thus,modelling a memristor mathematically is more relevant and useful. With regard to various mathematical dynamical models of a memristor, their corresponding equivalent memristive circuits are different. Without loss of generality,let’s illustrate with an example of the equivalent circuit of a memristor, a second power nonlinear described magneticcontrol memristor [19] in the following.

Example 1:A control voltage sourceVC(t) in Fig. 1 can be achieved by a second power nonlinear magnetic-control memristor [19], as shown in Fig. 2.

Fig. 2. A second power nonlinear described magnetic-control memristor.

In Fig. 2,Eis the input port of a second power memristor andVEis an equivalent control voltage. The portCin Fig. 2 is identical with the portCin Fig. 1.A15is a phase-reversing integrator andA16is a phase-reversing proportioner. gM1is the multiplication gain of a multiplier. Thus, according to the virtual short and virtual off electrical characteristics of an operational amplifier, we have

Substituting (14) into (11) and (13), we obtain

Equation (15) shows thatRAB(t) is related to the historical information of a second power memristor, whose nonvolatility property depends on the second power of the integral of an equivalent control voltage,

Note that, from the aforementioned discussion, we can further observe that at first, connecting the input port of control voltage source of a large dynamic range floating VCLR with the voltage output of the equivalent circuit of an arbitrary memristor, a versatile LDRFME can be implemented. Then, substituting the input port and output port of a LDRFME (the portsAandBin Fig. 1) for those of a memristor, the memristor in system integration can be replaced by the corresponding floating memristor emulator.Second, in Example 1, since the control voltage sourceVC(t)is generated by an equivalent circuit of the memristor, the memristanceof a LDRFME cannot be controlled by its input potential difference (VA?VB). No matter whatVA?VB,the memristanceof a LDRFME is always controlled byVC(t). Thus, in this case, the LDRFME is actually a three-port mirror memristor. Third, in particular, portsAandBin Fig. 1 can be directly connected with portEin Fig. 2 through a subtracter. Then,VA?VBdirectly controls the electrical characteristics of a memristor itself,On this occasion, the LDRFME converts to a two-port ordinary memristor. Fourth, more generally, the control voltage sourceVC(t)can be achieved by a non-memristive nonlinear signal producing circuit. In this case, the LDRFME is simplified to be the analog circuit of a large dynamic range floating VCLR.

III. EXPERIMENT AND ANALYSIS

In this section, the electrical characteristics of a LDRFME are analyzed by software simulation and real measurement,respectively.

Experiment 1:Regarding Example 1, we directly connect portsAandBin Fig. 1 with portEin Fig. 2 through a subtracter.Thus,VE(t)=VA(t)?VB(t). SupposeVE(t)=psinωtin Fig. 2,where ω is driving frequency. Thus, the peak-to-peak value of the input voltage of this LDRFME,VA(t)?VB(t), is equal topV. We use the popular SPICE simulation software from multisim12 and a virtual oscilloscope XSC1 to perform Experiment 1. Note that since the real memristors have not been largely commercialized until now, the application of a floating memristor emulator to memristive systems is reasonable.Further, since the LDRFME is an analog circuit device, its output signal is continuous, and can be detected in a very small time domain. Although the real memristors already have switching speeds of nanoseconds with reading speeds going into the picosecond regeme, for convenience of demonstration by commonly used oscilloscope, we still select reading speeds in the scale of milliseconds, which does not weaken the applicability of a LDRFME in smaller time domain. With regard to the aforementioned Example 1, we select the type of the operational amplifiersA1?A16,N-channel JFET and multiplier are OP07CP, 07N03L and AD633ANZ, respectively.For the convenience of simulation, we assume thatgM1=gM2=gM3=1,r=1Ω andc= 1 μF. Further, without loss of generality, we suppose that the dynamic range ofVDSof a JFET is enlarged 8-fold. Thus, α=1/8. Therefore, from Figs. 1 and 2, the electrical characteristics of a LDRFME can be shown in Fig. 3.

In Fig. 3 , Channel_A has an input voltage ofVA(t)?VB(t)=VE(t) and Channel_B has currentIin(t) orIout(t). From Fig. 3, we observe that at first, the electrical characteristics of a LDRFME accord with three fingerprints of a memristor [8]. For a LDRFME, if its initial state is zero and it is stimulated by a bipolar periodic signal with zero starting value, there is a pinched hysteresis loop in theVi?Iiplane,which has multiple-valued Lissajous curve for allIi(t) except when it passes through the pinched point (0,0). The corresponding lobe area of its pinched hysteresis loop in theVi?Iiplane decreases with the increasing of the frequency ω ofIi(t). When ω!1, the pinched hysteresis loop of a LDRFME in theVi?Iiplane shrinks to a line segment. These simulation results verify the effectiveness of a LDRFME.Second, one of the fingerprints of a memristor is that the side lobe area of its pinched hysteresis loop decreases with the increase of its driving frequency ω [20], which is inherited by the equivalent circuit of a second power memristor shown in Fig. 2. Thus, as shown in Figs. 3(f) and 3(l), when ω!1, a pinched hysteresis loop in theVi?Iiplane degenerates to a single-valued curve for allIi(t). Third, the dynamic range ofVDSof a JFET is enlarged 1 /α-fold by the two aforementioned bootstrapping circuits of a LDRFME. The variation range of the input peak-to-peak voltage of aN-channel JFET 07N03L is approximatelyVDS2[0 V, 1.25 V]. For α =1/8 in Experiment 1, the variation range of the input peak-to-peak voltage of a LDRFME is enlarged 8 times, (VA?VB)2[0 V, 10 V]. The input voltage of a LDRFME can vary in a large dynamic range.

Experiment 2:Regarding Example 1, we achieve experimental analysis by real measurements. We keep the aforementioned parameter settings unchanged and use a Tektronix oscilloscope TDS 1012C-EDU. The actual real analog circuit of a LDRFME can be achieved, as shown in Fig. 4.

Therefore, from Fig. 4, the electrical characteristics of the actual real analog circuit of a LDRFME can be shown in Fig. 5.

In Fig. 5,ptriωtdenotes a triangular wave function withdriving frequency ω and peak-to-peak valuep. CH_1 is the input voltage ofVA(t)-VB(t)=VE(t) and CH_2 is the currentIin(t)orIout(t) of the actual real analog circuit of a LDRFME.From Fig. 5, we can see that at first, in a similar way to those of Experiment 1, the electrical characteristics of the actual real analog circuit of a LDRFME accord with three fingerprints of a memristor [8], as well as its input voltage can vary in a large dynamic range. Second, the shape variation of input signal can also nonlinearly change the currentIin(t) orIout(t) and the pinched hysteresis loop of a LDRFME. Third, since the power consumption of the actual real analog circuit of a LDRFECM is equal to the output power of the signal generator in Fig. 4,we can directly read out its power consumption is about 1Watt.

IV. CONCLUSIONS

In this paper, to enlarge the dynamic range of maximum ratings of a memristor, a LDRFME is proposed to be achieved using VCLR. Equations (3) and (4) show that whenVDSis very small, sinceRDSonly depends onVGS, a JFET is an approximate VCLR. Equations (6) and (7) show that the dynamic range ofVDSof a JFET is enlarged 1 /α-fold by the two aforementioned bootstrapping circuits. Comparing (6)with (11), we can further see thatRAB=(1/α)RDS. The input resistance of a large dynamic range floating VCLR is simultaneously enlarged 1 /α-fold larger than that of a JFET.The proposed LDRFME emulates the behavior and operates in nearly the exact way as that of a memristor, making it a feasible candidate for the floating memristor emulator.

With respect to the feasible large dynamic range floating memristor emulator and its applications, there are many other fascinating issues that need to be further studied, such as some other type floating equivalent circuits of memristor, the memristor based adaptive intelligence and learning systems,neural networks and weighted feedback systems, spikingtiming-dependent plasticity experimentation, chaotic systems,etc. These will be further discussed in detail in our future work.