Wentao Wu(伍文濤) Zhirong Lin(林志榮) Zhi Ni(倪志) Peizhan Li(李佩展)Tiantian Liang(梁恬恬) Guofeng Zhang(張國峰) Yongliang Wang(王永良) Liliang Ying(應(yīng)利良)Wei Peng(彭煒) Wen Zhang(張文) Shengcai Shi(史生才) Lixing You(尤立星) and Zhen Wang(王鎮(zhèn))
1State Key Laboratory of Functional Materials for Informatics,Shanghai Institute of Microsystem and Information Technology(SIMIT),Chinese Academy of Sciences(CAS),Shanghai 200050,China
2CAS Center for Excellence in Superconducting Electronics(CENSE),Shanghai 200050,China
3University of Chinese Academy of Sciences,Beijing 100049,China
4Purple Mountain Observatory,Chinese Academy of Sciences,Nanjing 210023,China
5University of Science and Technology of China,Hefei 230026,China
A cold preamplifier based on superconducting quantum interference devices (SQUIDs) is currently the preferred readout technology for the low-noise transition edge sensor(TES).In this work,we have designed and fabricated a series SQUID array(SSA)amplifier for the TES detector readout circuit. In this SSA amplifier,each SQUID cell is composed of a first-order gradiometer formed using two equally large square washers, and an on-chip low pass filter(LPF)as a radiofrequency(RF)choke has been developed to reduce the Josephson oscillation interference between individual SQUID cells.In addition,a highly symmetric layout has been designed carefully to provide a fully consistent embedded electromagnetic environment and achieve coherent flux operation. The measured results show smooth V–Φ characteristics and a swing voltage that increases linearly with increasing SQUID cell number N. A white flux noise level as low as 0.28μΦ0/Hz1/2 is achieved at 0.1 K,corresponding to a low current noise level of 7 pA/Hz1/2. We analyze the measured noise contribution at mK-scale temperatures and find that the dominant noise derives from a combination of the SSA intrinsic noise and the equivalent current noise of the room temperature electronics.
Keywords: SSA amplifier,TES detectors,on-chip low pass filter(LPF),noise contribution
Over the last 20 years, superconducting transition-edge sensor (TES) detectors have been implemented in a variety of microcalorimeters and bolometers operating at millimeter and sub-millimeter wavelengths,as well as the optical,x-ray,and gamma-ray bands.[1–3]Superconducting quantum interference devices(SQUIDs)are the ideal cold preamplifiers for TES detectors due to their low noise, low impedance, and low power dissipation characteristics. As the preferred readout preamplifiers,SQUIDs play an important role in TES detector systems. Because the SQUID amplifier operates as the low temperature preamplifier for the TES system, the SQUID amplifier noise can affect the overall signal-to-noise ratio of the TES detector configuration significantly and limit the detection sensitivity.[4–6]The noise in an SQUID amplifier consists of the intrinsic SQUID noise, the noise from the room temperature readout electronics,and any environmental noise; among which the room temperature electronics noise is dominant, particularly in mK-scale ultra-low temperature environments.[7–12]In order to reduce the noise contribution from the room temperature readout electronics and to match the SQUID amplifier to the most appropriate room temperature readout electronics,two types of SQUID amplifiers have been developed to date. One design is based on a doubletransformer scheme to realize both high input inductance and a high signal coupling capability, thus allowing low current noise to be obtained easily.[13]The double-transformer design can reduce the SQUID current noise seen from the input coil port, but cannot improve the SQUID flux noise performance. This design also increases the coupling between the SQUID amplifier and the TES detector strongly, which may produce potential operation instability.[14]Another type of SQUID design is the series SQUID array(SSA).The SSA design enhances the flux voltage transfer constantVΦsignificantly to reduce the noise contribution from the room temperature readout electronics. In addition, in an SSA composed ofNSQUID cells, the intrinsic flux noise should also scale as 1/N1/2, and this also reduces the SSA intrinsic flux noise to a certain extent,[8,15]although the SSA is slightly more complex to operate when compared with a single dc-SQUID.In order to achieve a linear increase in the swing voltage in tandem with the increasing numberNof SQUID cells in the array and achieve coherent flux, the SSA not only requires the SQUID cells to be sufficiently identical in termsof their critical currentIc, loop inductanceLs,cell, and mutual inductanceM, but also works to suppress the Josephson oscillation interference between the SQUID cells to avoidV–Φcharacteristics distortions.[16–18]This allows the excess noise caused byV–Φcharacteristics distortions to be effectively avoided,particularly in ultra-low-temperature(mK)TES readout amplifiers.[19–22]In this work,we develop an on-chip low pass filter (LPF) to suppress the Josephson oscillation interference between the individual SQUID cells. In addition, a highly symmetrical SSA amplifier layout is designed carefully to ensure that each SQUID cell senses same environmental electromagnetic field,thus improving the coherent flux further.[8,15,17]The measured results show smoothV–Φcharacteristics and an ultra-low white flux noise level at 0.1 K.Finally,we have successfully implemented the proposed SSA amplifier in a TES readout system.
We developed SSA amplifier designs based on an on-chip LPF, and a design schematic is shown in Fig. 1(a). An onchip LPF is series-connected on the bias line placed between the SQUID cells. The aim of this design is to suppress the Josephson junction (JJ) oscillation crosstalk between the individual SQUID cells and thus improve the isolation of each SQUID cell. This is intended to avoid the distortion of theV–Φcurve caused by crosstalk from adjacent cells and thus ensure the correct swing voltage for each SQUID cell linear superposition. The proposed SSA amplifier has been designed and fabricated. An optical microscope image of four SQUID cells from our proposed SSA amplifier withN=16 SQUID cells is presented in Fig.1(b). Each SQUID cell is a first-order series thin-film gradiometer that is composed of two square washers with a linewidth of 5 μm and a washer hole size of 22 μm. The two washers are both electrically insulated by an SiO2dielectric layer deposited on the top of them. Both the input and feedback planar coils over the SiO2dielectric layer are deposited with a figure-eight shaped profile. The coils are formed using 1-μm wide Nb lines with 1-μm wide gaps. A damping resistive elementRdis shunted at the terminals to the input and feedback coils. One of the SQUID cell loop terminals is interrupted by two square JJs with a junction area of 3 μm×3 μm. For a critical current density ofjc=100 A/cm2at a temperature of 4 K,thus the critical currentI0of the Josephson junctions is 9μA.To avoid hysteretic behavior, each junction is shunted using a 4-μm wide and 8-μm long shunt resistorRsthat is connected to a cooling fin to minimize the hot electron effect. In terms of a sheet resistance of 2 Ω/□,this leads to a shunted resistance ofRs=4 Ω for each junction. When the specific capacitance of our JJs is taken into account, the hysteresis parameterβcthen has a value ofβc=0.25. We have selectedβc<1 to ensure stable SQUID operation at mK-scale temperatures because of the parasitic capacitance. To ensure a consistent embedded electromagnetic environment and obtain coherent flux for the SSA amplifier, a highly symmetrical SSA amplifier layout is considered here. As a result, the other terminal of the individual SQUID cell loop is also interrupted by two damping resistances and a cooling fin. In addition to the design symmetry,the damping resistances can also be used as damping elements for the individual SQUID cell washers. The on-chip LPF consists of an inductance and a resistance. The inductance has a value of approximately 0.5 nH and is fabricated by a planar spiral inductance element, and the parallel resistance component has a value of approximately 6 Ω. The parallel resistance can not only increase the isolation levels and reduce crosstalk,but also can eliminate potential high frequency resonance due to its low power dissipation.[21,22]Several detailed design parameters of the proposed SSA amplifier are summarized in Table 1. Additionally,based on the design parameters presented above, we have also fabricated an SSA amplifier without the LPF as a comparison device. The proposed SSA amplifier was fabricated with high-quality Nb/Al–AlOx/Nb trilayer JJs fabricated in a standard fabrication process at the Superconducting Electronics Facility (SELF), of the Shanghai Institute of Microsystem and Information Technology. The detailed process steps have been reported previously in Ref.[23]and the most important steps are summarized here. The fabrication process begins with deposition of the TiPd shunt resistance element on the thermally oxidized silicon substrate. A TiPd layer is patterned using either lift-off or an ion beam etching (IBE)technique. The thickness and sheet resistance of this layer are 40 nm and 2 Ω/□, respectively. Next, an SiO2layer is deposited over the TiPd layer via plasma-enhanced chemical vapor deposition(PECVD),and contact holes are then created using reactive ion etching(RIE).Then,an Nb/Al-AlOx/Nb trilayer is depositedin situusing magnetron sputtering.A 10-nm aluminum(Al)film is deposited to create a barrier layer, and then subsequently oxidized in a static O2atmosphere in the load lock of the sputtering system. The trilayer is patterned in three steps. First, the Nb counter electrode is patterned to the junction size using an i-line stepper and etched using RIE.Subsequently, the Al–AlOxlayer is etched using either IBE or a wet developer. The bottom Nb layer is then patterned to form an SQUID washer and is electrically connected to both the TiPd layer and SQUID interconnections. An SiO2layer is then deposited over the trilayer by PECVD and etched using RIE to create contact holes. In the next step, an Nb film wiring layer is deposited and patterned to form the input and feedback coils and the JJ lead. Finally, a TiAu bias resistor for the cryogenic detectors is deposited and patterned using the lift-off technique. During fabrication, all metal layers including the Nb/Al–AlOx/Nb trilayers are deposited using a dc magnetron sputter; after each RIE and IBE process, organic cleaning is performed to remove the photoresist.
Fig.1. (a)Schematic and(b)optical microscope images of the SSA amplifier with an on-chip LPF between the adjacent SQUID cells.
Table 1. Design parameters of the SSA amplifier.
The measurements of the fabricated SSA amplifier were performed at 4.2 K and 100 mK. A low noise SQUID electronic system XXF-1 with direct SQUID readouts was used for the SSA amplifier tuning and flux locked loop mode.[24]The basicV–Φcharacteristics of the SSA amplifier were measured at 4.2 K by immersing the amplifier into liquid helium. Each amplifier was glued to a customized printed circuit board and mounted on a liquid helium dip probe that was equipped with a superconducting Nb can as a shield from stray magnetic fields.The mK-scale ultra-low temperature measurements were performed in an adiabatic demagnetization refrigerator (ADR)with an operating temperature of approximately 100 mK.The SSA amplifier was glued to a Cu block that was thermally anchored to a base cold plate and surrounded by a superconducting Al shield cover.The TES detector was also installed on the same Cu block along with the SSA amplifiers and connected via wire-bonding line. We compared theV–Φcharacteristics of the SSA amplifier measured at various bias currents with and without the on-chip LPF, and the results measured at a temperature of 4.2 K are presented in Fig.2(a)and Fig.2(b).TheV–Φcharacteristic of the SSA amplifier shows basically sinusoidal and represents an almost single-junction likeV–Φcharacteristic. We can clearly see that when the on-chip LPF is presented,theV–Φcharacteristics are much smoother without any distortions,and the swing voltage is much larger at the same bias current. These results demonstrate that use of the on-chip LPF improves the SQUID cell isolation and ensures linear superposition of the swing voltage for a single SQUID cell.
Fig. 2. Measured results of the fabricated SSA amplifier at a temperature of 4.2 K. The V–Φ characteristics are shown at various values of applied bias current. The measured results(a)with and(b)without the on-chip LPF component, and the maximum swing voltages are approximately 300 μV and 260μV,respectively.
The measured noise performances at 3.0 K and 0.1 K are presented in Fig. 3. A white flux noise level as low as 0.52 μΦ0/Hz1/2was achieved at 3.0 K, corresponding to a current noise level of 13 pA/Hz1/2; and the flux noise levelas low as 0.28μΦ0/Hz1/2was achieved at 0.1 K,corresponding to an ultra-low current noise level of 7 pA/Hz1/2. For a further noise characterization of the SSA amplifier and the SSA intrinsic noise in particular, we have performed a simple decomposition of the measured noise. The measured noise of the SSA amplifier is mainly determined by the SSA intrinsic noiseSΦ,ssa,and the voltage noiseSV,electronicsand current noiseSI,electronicsof the room temperature readout electronics,and the measured noise level is thus given by
where
HereSΦ,V,electronicsandSΦ,I,electronicsdenote the equivalent flux noise components at the input termination when converted from the voltage noise and current noise of the room temperature readout electronics, respectively. TheSΦ,V,electronicsis inversely correlated with the flux conversion coefficientVΦand is strongly dependent on the working point,[25]and the noise componentSΦ,I,electronicsis positively correlated with the corresponding current sensitivityMdynand is weakly dependent on the working point. Roughly speaking,Mdynscales in tandem with the SQUID inductanceLsand has a value in the range betweenLsand 2Lsfor low-critical-temperature (low-Tc) SQUIDs.[25]In order to evaluate the SSA intrinsic noise accurately, we perform the following approximation. When the temperature is reduced from 3 K to 0.1 K,the SSA intrinsic noise will be reduced by approximately 10 times,[25]and the noise componentSΦ,V,electronicsfrom the room temperature readout electronics will be reduced slightly with the increase of the flux conversion coefficientVΦ, with this reduction assumed to be approximately 0.8 times. The contribution of the other noiseSΦ,I,electronicsis assumed to be reduced by 0.9 times because of the weak scale of its relationship with the operating point.[25]In addition,it is assumed that the ratio coefficient of the noise componentSΦ,V,electronicsto both the SSA amplifier intrinsic noiseSΦ,ssaand the noise componentSΦ,I,electronicsisλ. It should been seen from Fig.3(a)that the measured noise of the SSA amplifier at 3 K does not vary significantly with the bias voltageVb. The main reason for this behavior is that the measured noise is mainly determined by the SSA amplifier intrinsic noise and the room temperature readout electronics flux noise componentSΦ,I,electronics, while the other noiseSΦ,V,electronicsfrom the room temperature readout electronics makes only a small contribution. Therefore, the ratio coefficientλis a small quantity and has a value of much less than 1. We thus obtain the following equations:
Thus the three noise contributions as a function of the ratio coefficientλcan be given as follows:
Thus using the equations above and a small value ofλ,it is obvious that both the SSA intrinsic flux noiseSΦ,ssaand the room temperature readout electronics noise componentSΦ,I,electronicsare weakly dependent on the ratio coefficientλ. When the temperature is 3.0 K, the flux noise mainly comes from the SSA intrinsic noise of approximately 0.45 μΦ0/Hz1/2. But when the temperature is reduced to 0.1 K,the main noise contributions comes from both the room temperature readout electronics noise componentSΦ,I,electronicsand the SSA intrinsic noiseSΦ,ssa,in which the SSA intrinsic flux noiseSΦ,ssais approximately 0.15μΦ0/Hz1/2,and the room temperature readout electronics noise componentSΦ,I,electronicsis approach to 0.2μΦ0/Hz1/2. Regardless of the operating temperature, the other noise componentSΦ,V,electronicsfrom the room temperature readout electronics makes the lowest contribution to the measured noise. We can therefore conclude that it is necessary to reduce both the SSA intrinsic noiseSΦ,ssaand the room temperature readout electronics noise componentSΦ,I,electronicscontinuously to enable further reduction of the measured noise of the SSA amplification system,particularly at mK-scale operating temperatures.
It can be seen from Fig. 3 that the noise performance of the SSA amplifier is strongly dependent on the bias current and voltage, particularly at mK-scale temperatures. In order to achieve an optimal noise performance, we optimize both the bias current and the bias voltage of the SSA amplifier,with optimization results as presented in Fig.4. These results obviously illustrate that the optimal bias point voltage of the SSA amplifier is approaching 30% below the center, and the optimal bias current is about 18 μA, corresponding to approxi-mately 10%below the critical current of 20μA.Based on the proposed SSA amplifier and the optimal noise bias conditions,we have successfully used the SSA amplifier as a preamp in the readout circuit of the TES detector reported in Ref. [26].Figure 5 presents the current noise spectra measured at different TES bias resistances. The optimized SSA operating point is shown in the inset of Fig. 5. The noise level of the TES detection system is strongly dependent on the operating resistance of the TES. When the TES is biased at a normalized resistance, the noise level approaches to the lowest level, because the current noise of the resistance is inversely correlated with the resistance value.
Fig.4. The current noise spectra of the SSA amplifier at mK-scale temperatures as a function of the relative bias voltage percentage for various values of the bias current Ib. The voltage Vo is half of the maximum swing voltage at a specific bias current,and Vb is a bias voltage.
Fig. 5. The current noise spectra of the TES detection system based on the SSA amplifier operating at mK-scale temperatures,where the optimized SSA amplifier operation point is presented in the inset.
In order to improve the sensitivity of the TES detection system, it is well known that considerable efforts should be made to reduce the noise level of the SQUID readout circuit. As mentioned above, the dominant noise sources of the SQUID readout circuit in the mK-scale temperature range are the SSA amplifier intrinsic noiseSΦ,ssaand the room temperature readout electronics noise componentSΦ,I,electronics. The noise componentSΦ,I,electronicsis significantly determined by the equivalent current noise properties of the room temperature amplifier, and the SSA amplifier intrinsic noiseSΦ,ssamainly comes from the shunted resistance thermal noise,which is inversely related to the resistance value.[25]Unfortunately, the hysteresis parameterβcis proportional to the shunted resistanceRs. Therefore,in the future SSA amplifier design,it will be necessary to optimize the appropriate shunted resistance for the noise performance and the hysteresis parameterβcin the mK-scale temperature conditions.
We have designed and fabricated a proposed SSA amplifier based on an on-chip LPF component and a highly symmetrical layout design. The measure results demonstrate that the proposed SSA amplifier shows smoothV–Φcharacteristics and achieves coherent flux operation. Meanwhile, a measured white flux noise level as low as 0.28μΦ0/Hz1/2is achieved at 0.1 K, corresponding to a low current noise level of 7 pA/Hz1/2. We analyzed the measured noise contributions at mK-scale temperatures and confirmed that the noise significantly comes from the SSA amplifier intrinsic noise and the current noise of the room temperature readout electronics. In addition,an optimal noise performance is obtained by performing bias current and voltage optimization at mK-scale temperatures. Based on the optimal noise operation point,the proposed SSA amplifier as a cold preamplifier has been applied successfully to a TES readout circuit.
Acknowledgements
Project supported by the National Key Research and Development Program of China(Grant No.2017YFA0304003).
The devices were fabricated at the Superconducting ELectronics Facility(SELF),of the Shanghai Institute of Microsystem and Information Technology.