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    Vertical MBE growth of Si fins on sub-10 nm patterned substrate for high-performance FinFET technology*

    2021-07-30 07:42:52ShuangSun孫爽JianHuanWang王建桓BaoTongZhang張寶通XiaoKangLi李小康QiFengCai蔡其峰XiaAn安霞XiaoYanXu許曉燕JianJunZhang張建軍andMingLi黎明
    Chinese Physics B 2021年7期
    關(guān)鍵詞:張建軍黎明小康

    Shuang Sun(孫爽) Jian-Huan Wang(王建桓) Bao-Tong Zhang(張寶通) Xiao-Kang Li(李小康)Qi-Feng Cai(蔡其峰) Xia An(安霞) Xiao-Yan Xu(許曉燕) Jian-Jun Zhang(張建軍) and Ming Li(黎明)

    1Department of Micro-Nanoelectronics,Peking University,Beijing 100871,China

    2Beijing Laboratory of Future IC Technology and Science,Peking University,Beijing 100871,China

    3Beijing National Laboratory for Condensed Matter Physics and Institute of Physics,Chinese Academy of Sciences,Beijing 100190,China

    Keywords: sub-10 nm fin,molecular beam epitaxy,defects,mobility

    1. Introduction

    As the IC technology node approaches 3 nm and below,surface roughness scattering of the channel greatly limits the carrier mobility and seriously affects the on-state current of FinFETs.[1-8]However, traditional plasma dry etching methods inevitably introduce a large number of random defects on the top and sidewalls of the fin channel, which consequently degrades the carrier mobility. As an alternative to top-down fin technology,the bottom-up process enables the atoms to be arranged according to the principle of minimum system energy and thus to form an almost perfect lattice structure close to its intrinsic properties. However, the traditional catalytic growth suffers from metal contaminations and imprecise positioning, so it is not suitable for large-scale integration.[9-16]Other researchers have also studied the molecular beam epitaxy(MBE)growth of nanowires on a non-patterned substrate,but the control of size and position is quite difficult.[17-28]Recently, some experiments on MBE growth have been conducted on 30-nm scale patterned Si templates.[29,30]However,there is scant research on the vertical MBE growth with sub-10 nm patterns,which is required for future nanoscale FinFET technology.

    In this work, we successfully fabricated uniform sub-10 nm Si fin arrays as the template and studied the MBE behavior dependent on the fin pattern width and orientations.The lattice quality of the MBE grown Si fin was statistically investigated by high resolution transmission electron microscope (TEM) and compared to the dry etched Si fin patterns.The kinetic mechanism of sub-10 nm patterned MBE was also proposed.

    2. Experiments and results

    The fin-type Si template was firstly patterned by standard e-beam lithography using hydrogen silesquioxane(HSQ)photoresist on(100)oriented 4-inch bulk silicon wafers.The vertical fin arrays were then formed by reactive ion etching with an etching depth of 70 nm. The fin widths varied from 10 nm to 50 nm and there were two fin orientations of〈100〉and〈110〉.The in-line critical dimension scanning electron microscope(CD SEM)picture and TEM cross-sectional view of the sub-10 nm fin are shown in Figs.1(a)and 1(b). The top width of the fin is 12 nm and the middle width is only 7.4 nm. The lattice structure after etching is also shown in Fig. 1(c) by high resolution TEM(HRTEM).On the sidewall,an amorphous defective region was observed. With the fast Fourier transform in Fig. 1(d), the crystalline structure of the ultra-thin fin was damaged.

    After fin formation,we used diluted HF acid(HF:H2O=1:20)to remove the HSQ photo-resist and natural oxide layer on the surface of the Si fins. Within a short queue time,the sample was loaded into the MBE chamber to avoid reoxidation in the atmosphere. The base vacuum of the chamber was set to be 10-9torr. Then H2O(g)and CO2/N2were desorbed from the surface of the sample at 200°C and 400°C,respectively. After that, we turned on the silicon source, and deposited a 20 nm silicon buffer layer to suppress initial defects and a 30nm silicon epitaxial layer at a substrate temperature of 350°C and 400°C,separately.

    The MBE grown fin arrays were then inspected by topview SEM as shown in Figs. 2 and 3. It can be seen that the fins became wider because of the lateral growth. For the original 10 nm fins,the grown planes closed as a ridge line on the top surface to indicate saturated epitaxy from both sidewalls.For the original 30 nm and 50 nm fins,however,plateaus were formed on the top surface due to insufficient epitaxy. Compared to the〈110〉-oriented fin,the lateral growth of the〈100〉-oriented fin was relatively larger. With careful examination of the surface morphology,no threading dislocation or stack fault induced pits or line defects are observed in Figs. 2 and 3. It can then be inferred that few defects transfer from the etched fin to epitaxial layer.

    Fig.1. CD SEM(a),cross-sectional TEM(b),zoom-in HRTEM(c)and FFT images (d) of the sub-10 nm fin fabricated by e-beam lithography with an exposure dose of 24 C/cm2 and reactive ion etching.

    Fig.2. SEM images of fin patterns along〈100〉direction after MBE growth with initial widths of 10 nm(a),30 nm(b)and 50 nm(c).

    Fig.3. SEM images of fin patterns along〈110〉direction after MBE epitaxy with the initial widths of(a)10 nm,(b)30 nm and(c)50 nm.

    To further confirm the amount and quality of MBE growth, cross-sectional TEM images were taken and are shown in Figs.4 and 5. It was found that the vertical growth by MBE was obtained on the〈100〉fin patterns with the minimum width of 27 nm and height of 70 nm. The difference between the〈100〉and〈110〉fins was the lateral grown facet.On the sidewall is there still(001)plane grown,indicating vertical growth with a little lateral expansion,which may be due to a non-ideally perpendicular molecular beam to the wafer plane and atom diffusion on the sidewalls. For〈110〉fins,the saturated (111) and (311) facets were observed on the sidewalls. Such orientation-dependent facet formation is similar to the process of metal-organic chemical vapor deposition(MOCVD).[31,32]The epitaxy growth fully closed on the original 10 nm fins to form a ridge line on the top surface in Fig.3(a). From the viewpoint of electron mobility,the grown fins on〈100〉patterns can contribute more benefits.

    It is worth noting that no matter where the fin orients,the MBE growth can be divided into two parts, with one starting from the trench bottom and the other starting from the top surface. Such growth behavior can prevent the grown fins from being affected by the plasma damage on the original fin patterns. In fact, we did not observe any dislocation or faults inside the grown layer as shown in the HRTEM images of Figs.4(d)-4(f)and 5(d)-5(f). Combined with the fast Fourier transform,(200)crystal lattice with 2.6 ?A lattice constant for〈100〉-oriented fin patterns and (111) crystal lattice with 3.15 ?A lattice constant for〈110〉-oriented fin patterns were confirmed, both of which correspond to the observed facet configurations in the TEM images.

    Fig.4. Cross-sectional TEM images(a)-(c), zoom-in HRTEM images(d)-(f)and FFT images(g)-(i)of〈100〉-oriented fins after vertical MBE growth with the original widths of 10 nm(a)(d)(g),30 nm(b)(e)(h)and 50 nm(c)(f)(i).

    Fig.5. Cross-sectional TEM images(a)-(c), zoom-in HRTEM images(d)-(f)and FFT images(g)-(i)of〈110〉-oriented fins after vertical MBE growth with the original widths of 10 nm(a)(d)(g),30 nm(b)(e)(h)and 50 nm(c)(f)(i).

    In order to further confirm the defect distribution in the MBE grown silicon fin, cross-sectional TEM, HRTEM and FFT were employed to analyze the〈110〉epitaxial fin with initial 50 nm width at left,center and right positions along the longitudinal direction. As shown in Fig. 6, it was found that the defects were confined at the buffer layer/substrate and top layer/buffer layer interfaces. All the confined defects are away from the surface of the top layer and thus impact little on the mobility of the field-effect transistor. In the region close to the surface of the top layer,HRTEM and FFT were performed to confirm the perfect single crystalline lattice quality.

    Fig.6. Cross-sectional TEM(a)-(c),zoom-in HRTEM(d)-(f)and FFT images(g)-(i)of〈110〉-oriented fin at left(a)(d)(g),center(b)(e)(h)and right(c)(f)(i)positions along the longitudinal direction.

    The lateral expansion amount almost linearly depends on the original pattern width as shown in Fig. 7. It can be seen that the average unilateral growth on〈110〉patterns is less than that on〈100〉patterns due to the saturated facet growth on the sidewalls. As the original pattern width increases, the unilateral growth decreases for both〈110〉and〈100〉orientations.

    Fig.7. Unilateral growth thickness dependent on the original fin width after MBE growth.

    The lateral broadening will become a concern on the short channel effect of FinFET.In order to reduce the lateral broadening of epitaxial fins,one method is to add the tightly neighboring fins as dummies to screen the beam incidence onto the sidewall of the target fins so as to avoid the atom piling up. In the meantime,decreasing the process temperature can also result in enhanced vertical growth and reduced density of threading dislocations according to the reference.[33]Therefore, we can combine the layout design and process optimization to reduce the broadening effect.

    On other hand,the uniformity of vertical MBE growth is another concern for future VLSI manufacturing. Actually,the uniformity is related not only to the epitaxial growth,but also the lithography and dry etching processes for the fin pattern preparation. The non-uniformity of the unilateral broadening amount was investigated within vertical grown fin arrays with different widths and orientations. For〈110〉fins with initial widths of 10 nm, 30 nm, and 50 nm, the non-uniformities are 4.8%, 4.6% and 2.9%, respectively. For〈100〉fins with the same initial widths, the non-uniformities are 4.4%, 3.4%and 4.7%, respectively. The results are quite reasonable and acceptable for the VLSI manufacturing. With the restricted layout design,the growth uniformity would be expected to be further improved as well as the reduced broadening effect.

    3. Discussion

    Fundamentally,the MBE growth process can be regarded as the result of atom deposition and diffusion.

    As shown in Fig.8,at stage 1 of growth,the silicon atoms were deposited on the surface by molecular beam. Accompanied by atom deposition,some of them diffuse on the surface to seek the energy minimum points to form a stable facet. The silicon atom diffusion on the(110)plane is slower than that on the (100) plane as a result of higher areal atom density. The atom diffusion from the top surface to the sidewall in〈110〉patterns was then reduced so that the unilateral growth thickness was less than that in〈100〉patterns.

    Fig. 8. The three stages of growth kinetics of MBE on (a) 〈100〉 and (b)〈110〉-oriented fnis.

    At stage 2,more atoms diffuse and accumulate at the pattern edge to form vertical growth. At the same time, some facets start to get into shape. For〈100〉patterns, the top surface and sidewalls are the orthogonal(100)planes so that some high-Miller-index facet(0xy)is formed, rather than the(111)facet. For〈110〉patterns,however,(111)facets can be stably formed between the orthogonal(100)plane of the top surface and the(110)plane of sidewalls.

    Once the facet is formed, the growth gets into stage 3

    where the vertical growth starts and the facets get into a closed ridge line at the top of the fins. Compared to the (0xy) facet,the atom diffusion on the(111)facet is slower so that the facet saturation on〈110〉patterns is reached earlier.Before the facet closing,more atoms will diffuse on the plateaus on the top for wider fins,so that the unilateral growth is less than that in narrower fins.

    4. Conclusion

    In this study, high quality Si layer growth on sub-10 nm fins by MBE was proposed to fabricate defect-free channels for future integrated technology beyond the 3 nm node. Due to the balance of vertical deposition and lateral diffusion of silicon atoms,fully vertical growth can be obtained on〈100〉patterns on a(100)wafer without dislocation and sidewall damages. Finally,27 nm width and 70 nm height vertical fins were fabricated by patterned MBE at a temperature of 400°C.

    Acknowledgment

    The authors are grateful for support by the Frontiers Science Center for Nano-optoelectronics, Peking University,100871,Beijing,China.

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