超低功耗高性能集成路器件與工藝基礎(chǔ)研究立項(xiàng)報(bào)告

張興　劉曉彥

摘 要：該研究將針對(duì)集成電路特征尺寸發(fā)展至16 nm及以下技術(shù)節(jié)點(diǎn)后所面臨的關(guān)鍵科學(xué)問(wèn)題，以在16 nm及以下技術(shù)節(jié)點(diǎn)集成電路技術(shù)擁有自主知識(shí)產(chǎn)權(quán)的若干關(guān)鍵核心技術(shù)和解決方案為目標(biāo)，圍繞納米尺度下集成電路進(jìn)一步發(fā)展所面臨的核心矛盾；從材料體系、集成工藝、新結(jié)構(gòu)邏輯器件、新型存儲(chǔ)器件與互連技術(shù)等基礎(chǔ)層面進(jìn)行系統(tǒng)深入的研究；將新材料體系、新的器件結(jié)構(gòu)、存儲(chǔ)單元、互連技術(shù)以及集成工藝技術(shù)基礎(chǔ)等方面的研究工作有機(jī)結(jié)合，多層次、綜合性地解決16 nm及以下技術(shù)節(jié)點(diǎn)集成電路器件和工藝所面臨的關(guān)鍵科學(xué)問(wèn)題。使我國(guó)在新一代集成電路技術(shù)領(lǐng)域擁有自主知識(shí)產(chǎn)權(quán)的若干關(guān)鍵核心技術(shù)，推動(dòng)我國(guó)硅基集成電路產(chǎn)業(yè)的可持續(xù)發(fā)展，為國(guó)家重大科技專(zhuān)項(xiàng)開(kāi)展16 nm特征尺寸集成電路產(chǎn)業(yè)化技術(shù)奠定理論和技術(shù)基礎(chǔ)，同時(shí)為我國(guó)納米尺度硅基集成電路科學(xué)技術(shù)和產(chǎn)業(yè)培養(yǎng)一批高水平人才。

關(guān)鍵詞：集成電路技術(shù) 低功耗 邏輯器件 非易失存儲(chǔ)器件 器件模型模擬 互連技術(shù) 工藝集成

Abstract：This project will focus on the critical issues of the science and technology as IC technology scaling down to 16 nm node and beyond. Aimed to have a number of core technologies and proprietary solutions for 16 nm node and beyond integrated circuit technology， organizes researches on the basics science and technology problems from material systems， integrated technology， the new structure logic devices systematic in-depth research， new technology and other memory devices and interconnect. Combined the material， devices structure， interconnect and process integration researches to investigating systematic solutions of the key scientific issues of 16 nm and beyond IC technology. The achievements of this project will support the sustainable development of silicon-based integrated circuit industry in our country.

Key Words：Integrated circuit technology；Low power；logic devices；NV memory devices；Devices modeling and simulation；Interconnect technology；Process integration

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